ECU Libraries Catalog

Innovative Architecture for Future Generation High-Performance Processors and Systems : Postproceedings, 1998 International Workshop

Author/creator Veidenbaum, Alex Editor
Other author/creatorJoe, Kazuki Editor
Other author/creatorMaui High-Performance Computing Center Staff.
Other author/creatorIEEE Xplore (Online service)
Format Electronic and Book
Publication InfoLos Alamitos : IEEE Computer Society Press
Description180 p. ill 28.000 x 022.000 cm.
Supplemental Content Full text available from IEEE Conference Proceedings Archive
Supplemental Content Full text available from IEEE Electronic Library (IEL)
Supplemental Content Full text available from IEEE Electronic Library (IEL) Conference Proceedings
Subject(s)
Summary Annotation A selection of 14 of the 19 papers presented at the workshop cover measuring, understanding, and optimizing application and system performance; prediction and speculative execution; interactions between hardware and software in architecture design; compilation; and parallel system architecture. Specific topics include system support for the dynamic optimization of application performance, a speculative multi-threading with selective multi-path execution, new methods for exploiting program structure and behavior in computer architecture, implementing a non-strict functional programming language V on a threaded architecture EARTH, and the architecture of a parallel computer Cenju-4. Only authors are indexed. Annotation copyrighted by Book News, Inc., Portland, OR
Access restrictionAvailable only to authorized users.
Technical detailsMode of access: World Wide Web
Genre/formElectronic books.
LCCN 99060129
ISBN9780769501253
ISBN0769501257 (Trade Cloth) Active Record
Standard identifier# 9780769501253
Stock number00029433